BCM56520:108-Gbps Integrated Ethernet Multilayer Switch
BCM4748:Intensi-fi XLR 2 x 2 IEEE 802.11n 2.4 GHz + 5 GHz SoC
The Broadcom BCM4748 processor is the highest performance SoC in the Intensi-fi XLR processor family. This device is an IEEE 802.11n-compliant CPU/MAC/baseband/radio AP solution designed for enterprise applications. Integrated on-chip is a powerful 533 MHz MIPS32 74K core with four-way set associative 32 KB instruction cache, a 32 KB two-way set associative data cache, and a 64-entry translation lookaside buffer. Enhanced CPU memory subsystem architecture provides increased system performance. Using multiple in/multiple out (MIMO) signaling with IEEE 802.11n protocol, information is sent and received over two or more antennas simultaneously using the same frequency band, thus providing greater range and increasing throughput while maintaining compatibility with legacy IEEE 802.11a/b/g devices. This improved functionality is accomplished through a combination of enhanced MAC and PHY implementations, including spatial multiplexing modes in the transmitter and receiver as well as advanced digital signal processing techniques to improve receive sensitivity. With its fully integrated dual-band radio transceiver, the chip architecture supports two streams with two antennas for TCP throughput of over 200 Mbps per radio. Switched antenna diversity operation is also supported for three antenna configurations. State-of-the-art security is provided by industry-standardized system support for WPA, WPA2 (IEEE 802.11i), and hardware-accelerated AES encryption/decryption coupled with TKIP and IEEE 802.1X support. Embedded hardware acceleration enables increased system performance and significantly reduces host CPU utilization in both client and AP configurations. The BCM4748 supports Broadcom FASTPATH Unified Access Point (UAP) software to enable complete enterprise AP solutions for standalone or switch-managed products. The BCM4748 integrates two USB 2.0 EHCI host ports. The device also includes an 8/16-bit parallel external bus interface (EBI) for Flash memory as well as other generic parallel devices. The 16 dedicated GPIOs are another feature of the device .
主要特性:
High-performance, low-cost IEEE 802.11n-compliant System-on-a-Chip (SoC) CPU/MAC/baseband/radio for enterprise wireless Access Point (AP) solutions
Optimized Intensi-fi XLR platform with Accelerange Technology — a unique set of hardware and software enhancements that ensure more robust wireless coverage
Integrated 533 MHz MIPS32 74K core
32 KB I-cache, 32 KB D-cache
64-entry translation lookaside buffer (TLB)
Enhanced 10/100/1000 Ethernet MAC controller
Integrated dual-band radio transceiver
On-chip SRAM for latency-sensitive applications
State-of-the-art security (IEEE 802.1X/WPA/WPA2)
USB 2.0 EHCI host ports
Up to 2 Gb DDR SDRAM and up to 32 MB Flash memory
主要優勢:
Single-chip IEEE 802.11n with reduced power consumption enables compact form factors with low cost and high-performance.
Optimized reduced bill of materials (RBOM) and PCB enable smallest cost delta over IEEE 802.11g designs.
Reduced host CPU utilization
Enhanced system performance
Two-stream spatial multiplexing with data rates up to 300 Mbps
Multiple memory (DDR/Flash) configurations supported to enable low-end to high-end performance options
應用:
Single- and dual-band IEEE 802.11n enterprise wireless APs
Simultaneous dual-band AP with additional MAC/PHY/ radio (e.g., BCM4342)
圖1. BCM4748方框圖
The BCM56520 is Broadcom’s seventh generation of the StrataXGS product line. It is a highly integrated multilayer switch designed to address new and emerging Enterprise and Metro Area Networking applications. With a combination of cost-optimized Ethernet functionality, sophisticated classification, accounting, and Metro protocols, and advanced services, the BCM56520 makes an ideal solution for the Enterprise wiring closet as well as Metro fixed access and edge networks.
The BCM56520 incorporates up to 24 ports of GbE and four ports of HiGig2. The four ports of HiGig2 can operate as standard IEEE 802.3ae XAUI or as ports running the HiGig2 protocol. Using the HiGig2 protocol, the BCM56520 can interconnect with other Broadcom devices for scalable, high-performance fixed, and modular systems.
Building upon the industry-leading XGS architecture, the BCM56520 is the industry’s first true unified wireless/wireline switch. Supporting the CAPWAP protocol for access point and mobility domain connectivity, the BCM56520 enables edge stackable systems to offer the performance and scalability previously only available on high-end wireless controllers. With this new paradigm, system vendors can deliver a seamless, integrated wireless solution with a dramatic reduction in total solution cost.
The BCM56520 also delivers the most critical emerging technologies in Metro Area Networking. It features popular protocols such as enhanced Q-in-Q (802.1ad), PLS/VPLS, Provider Backbone Bridging (802.1ah), Provider Backbone Transport (802.1Qay), and VLAN crossconnect.
Built upon a novel virtual port architecture, all of these protocols may operate simultaneously to satisfy all manner of Metro deployments.
As service providers deploy carrier Ethernet networks, two underlying technologies are used for guaranteeing service quality: time synchronization and OAM. The BCM56520 is architected with a comprehensive synchronization solution that includes layer-one clock recovery (G.8261) and hardware support for 1588v2 and 802.1AS. The highly scalable and flexible BCM56520 OAM solution relieves application software by handling critical high-bandwidth functions in hardware.
All devices in the BCM56520 family support a 32-bit PCI interface running at 66 MHz.
主要特性:
Seventh generation of Broadcom’s switching and routing technology
Industry’s first unified wireless/wireline switch, supporting CAPWAP tunneling and multiple mobility models
Non-blocking architecture, line rate for all packet sizes
Optimized for Metro applications; Multiprotocol Label Switching (MPLS), enhanced Q-in-Q, MAC-in-MAC, and IP tunneling
Carrier grade with robust memory protection schemes
Enhanced on-chip packet buffer, optimized for burst absorption and multicast at low latency
Flow control: Link pause, per Class of Service (CoS) priority, ServiceAwareFlow flow control mechanisms
Comprehensive support for layer-one clock recovery (G.8261) and packet-based timing (1588 and 802.1AS)
PCI host processor interconnect
主要優勢:
Highly integrated, purpose-built solution for:
- Enterprise wiring closet, fixed stackable, and stand-alone configurations
- Metro Access/Edge fixed applications
Provides a truly integrated wireless and wireline switching solution, enabling cost-effective unified switching in the wiring closet
Comprehensive, flexible Metro protocol interoperability via virtual ports
Hardware-based Ethernet Operations, Administration & Maintenance (OAM) support for guaranteed, full-standard performance; completely alleviates software support
Dynamic memory technology delivers optimum usage of packet buffer resources
Advanced congestion management for lossless packet delivery
Sophisticated per-port or per-flow user authentication scheme
Leverages Broadcom’s unified API for software reuse and quick time-to-market
圖2.BCM56520方框圖